Restructure wiki to prepare for Helios64.

* Move all previous info into Helios4 subfolder
* Add helios64 subfolder
* Update all url link

Note: http server has been configure to ensure existing inbound link can 
still be resolved to the right page.

docs/helios4/files/cesa/openssl-add-cryptodev-support.patch

@@ -0,0 +1,619 @@
+--- eng_cryptodev.c.old	2019-03-17 15:36:36.664406915 +0800
++++ eng_cryptodev.c	2019-03-17 23:14:23.348495380 +0800
+@@ -2,6 +2,7 @@
+  * Copyright (c) 2002 Bob Beck <beck@openbsd.org>
+  * Copyright (c) 2002 Theo de Raadt
+  * Copyright (c) 2002 Markus Friedl
++ * Copyright (c) 2012 Nikos Mavrogiannopoulos
+  * All rights reserved.
+  *
+  * Redistribution and use in source and binary forms, with or without
+@@ -73,7 +74,6 @@
+     struct session_op d_sess;
+     int d_fd;
+ # ifdef USE_CRYPTODEV_DIGESTS
+-    char dummy_mac_key[HASH_MAX_LEN];
+     unsigned char digest_res[HASH_MAX_LEN];
+     char *mac_data;
+     int mac_len;
+@@ -190,8 +190,10 @@
+ static struct {
+     int id;
+     int nid;
+-    int keylen;
++    int digestlen;
+ } digests[] = {
++#if 0
++    /* HMAC is not supported */
+     {
+         CRYPTO_MD5_HMAC, NID_hmacWithMD5, 16
+     },
+@@ -199,15 +201,15 @@
+         CRYPTO_SHA1_HMAC, NID_hmacWithSHA1, 20
+     },
+     {
+-        CRYPTO_RIPEMD160_HMAC, NID_ripemd160, 16
+-        /* ? */
++        CRYPTO_SHA2_256_HMAC, NID_hmacWithSHA256, 32
+     },
+     {
+-        CRYPTO_MD5_KPDK, NID_undef, 0
++        CRYPTO_SHA2_384_HMAC, NID_hmacWithSHA384, 48
+     },
+     {
+-        CRYPTO_SHA1_KPDK, NID_undef, 0
++        CRYPTO_SHA2_512_HMAC, NID_hmacWithSHA512, 64
+     },
++#endif
+     {
+         CRYPTO_MD5, NID_md5, 16
+     },
+@@ -215,6 +217,15 @@
+         CRYPTO_SHA1, NID_sha1, 20
+     },
+     {
++        CRYPTO_SHA2_256, NID_sha256, 32
++    },
++    {
++        CRYPTO_SHA2_384, NID_sha384, 48
++    },
++    {
++        CRYPTO_SHA2_512, NID_sha512, 64
++    },
++    {
+         0, NID_undef, 0
+     },
+ };
+@@ -289,13 +300,14 @@
+     static int nids[CRYPTO_ALGORITHM_MAX];
+     struct session_op sess;
+     int fd, i, count = 0;
++    unsigned char fake_key[CRYPTO_CIPHER_MAX_KEY_LEN];
+ 
+     if ((fd = get_dev_crypto()) < 0) {
+         *cnids = NULL;
+         return (0);
+     }
+     memset(&sess, 0, sizeof(sess));
+-    sess.key = (caddr_t) "123456789abcdefghijklmno";
++    sess.key = (void*)fake_key;
+ 
+     for (i = 0; ciphers[i].id && count < CRYPTO_ALGORITHM_MAX; i++) {
+         if (ciphers[i].nid == NID_undef)
+@@ -326,6 +338,7 @@
+ static int get_cryptodev_digests(const int **cnids)
+ {
+     static int nids[CRYPTO_ALGORITHM_MAX];
++    unsigned char fake_key[CRYPTO_CIPHER_MAX_KEY_LEN];
+     struct session_op sess;
+     int fd, i, count = 0;
+ 
+@@ -334,12 +347,12 @@
+         return (0);
+     }
+     memset(&sess, 0, sizeof(sess));
+-    sess.mackey = (caddr_t) "123456789abcdefghijklmno";
++    sess.mackey = fake_key;
+     for (i = 0; digests[i].id && count < CRYPTO_ALGORITHM_MAX; i++) {
+         if (digests[i].nid == NID_undef)
+             continue;
+         sess.mac = digests[i].id;
+-        sess.mackeylen = digests[i].keylen;
++        sess.mackeylen = 8;
+         sess.cipher = 0;
+         if (ioctl(fd, CIOCGSESSION, &sess) != -1 &&
+             ioctl(fd, CIOCFSESSION, &sess.ses) != -1)
+@@ -425,14 +438,14 @@
+     cryp.ses = sess->ses;
+     cryp.flags = 0;
+     cryp.len = inl;
+-    cryp.src = (caddr_t) in;
+-    cryp.dst = (caddr_t) out;
++    cryp.src = (void*) in;
++    cryp.dst = (void*) out;
+     cryp.mac = 0;
+ 
+     cryp.op = ctx->encrypt ? COP_ENCRYPT : COP_DECRYPT;
+ 
+     if (ctx->cipher->iv_len) {
+-        cryp.iv = (caddr_t) ctx->iv;
++        cryp.iv = (void*) ctx->iv;
+         if (!ctx->encrypt) {
+             iiv = in + inl - ctx->cipher->iv_len;
+             memcpy(save_iv, iiv, ctx->cipher->iv_len);
+@@ -484,7 +497,7 @@
+     if ((state->d_fd = get_dev_crypto()) < 0)
+         return (0);
+ 
+-    sess->key = (caddr_t) key;
++    sess->key = (void*) key;
+     sess->keylen = ctx->key_len;
+     sess->cipher = cipher;
+ 
+@@ -535,151 +548,164 @@
+  * gets called when libcrypto requests a cipher NID.
+  */
+ 
++
++static int cryptodev_cipher_ctrl(EVP_CIPHER_CTX *ctx, int type, int p1, void *p2)
++{
++    struct dev_crypto_state *state = ctx->cipher_data;
++    struct session_op *sess = &state->d_sess;
++
++    if (type == EVP_CTRL_COPY) {
++        EVP_CIPHER_CTX *out = p2;
++        return cryptodev_init_key(out, sess->key, ctx->iv, 0);
++    }
++    return 0;
++}
++
+ /* RC4 */
+ const EVP_CIPHER cryptodev_rc4 = {
+     NID_rc4,
+     1, 16, 0,
+-    EVP_CIPH_VARIABLE_LENGTH,
++    EVP_CIPH_VARIABLE_LENGTH|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     NULL,
+     NULL,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ /* DES CBC EVP */
+ const EVP_CIPHER cryptodev_des_cbc = {
+     NID_des_cbc,
+     8, 8, 8,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ /* 3DES CBC EVP */
+ const EVP_CIPHER cryptodev_3des_cbc = {
+     NID_des_ede3_cbc,
+     8, 24, 8,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_bf_cbc = {
+     NID_bf_cbc,
+     8, 16, 8,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_cast_cbc = {
+     NID_cast5_cbc,
+     8, 16, 8,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_aes_cbc = {
+     NID_aes_128_cbc,
+     16, 16, 16,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_aes_192_cbc = {
+     NID_aes_192_cbc,
+     16, 24, 16,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_aes_256_cbc = {
+     NID_aes_256_cbc,
+     16, 32, 16,
+-    EVP_CIPH_CBC_MODE,
++    EVP_CIPH_CBC_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ # ifdef CRYPTO_AES_CTR
+ const EVP_CIPHER cryptodev_aes_ctr = {
+     NID_aes_128_ctr,
+     16, 16, 14,
+-    EVP_CIPH_CTR_MODE,
++    EVP_CIPH_CTR_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_aes_ctr_192 = {
+     NID_aes_192_ctr,
+     16, 24, 14,
+-    EVP_CIPH_CTR_MODE,
++    EVP_CIPH_CTR_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ 
+ const EVP_CIPHER cryptodev_aes_ctr_256 = {
+     NID_aes_256_ctr,
+     16, 32, 14,
+-    EVP_CIPH_CTR_MODE,
++    EVP_CIPH_CTR_MODE|EVP_CIPH_CUSTOM_COPY,
+     cryptodev_init_key,
+     cryptodev_cipher,
+     cryptodev_cleanup,
+     sizeof(struct dev_crypto_state),
+     EVP_CIPHER_set_asn1_iv,
+     EVP_CIPHER_get_asn1_iv,
+-    NULL
++    cryptodev_cipher_ctrl
+ };
+ # endif
+ /*
+@@ -750,16 +776,6 @@
+     return (0);
+ }
+ 
+-static int digest_key_length(int nid)
+-{
+-    int i;
+-
+-    for (i = 0; digests[i].id; i++)
+-        if (digests[i].nid == nid)
+-            return digests[i].keylen;
+-    return (0);
+-}
+-
+ static int cryptodev_digest_init(EVP_MD_CTX *ctx)
+ {
+     struct dev_crypto_state *state = ctx->md_data;
+@@ -770,7 +786,6 @@
+         printf("cryptodev_digest_init: Can't get digest \n");
+         return (0);
+     }
+-
+     memset(state, 0, sizeof(struct dev_crypto_state));
+ 
+     if ((state->d_fd = get_dev_crypto()) < 0) {
+@@ -778,8 +793,8 @@
+         return (0);
+     }
+ 
+-    sess->mackey = state->dummy_mac_key;
+-    sess->mackeylen = digest_key_length(ctx->digest->type);
++    sess->mackey = NULL;
++    sess->mackeylen = 0;
+     sess->mac = digest;
+ 
+     if (ioctl(state->d_fd, CIOCGSESSION, sess) < 0) {
+@@ -795,8 +810,8 @@
+ static int cryptodev_digest_update(EVP_MD_CTX *ctx, const void *data,
+                                    size_t count)
+ {
+-    struct crypt_op cryp;
+     struct dev_crypto_state *state = ctx->md_data;
++    struct crypt_op cryp;
+     struct session_op *sess = &state->d_sess;
+ 
+     if (!data || state->d_fd < 0) {
+@@ -805,7 +820,7 @@
+     }
+ 
+     if (!count) {
+-        return (0);
++        return (1);
+     }
+ 
+     if (!(ctx->flags & EVP_MD_CTX_FLAG_ONESHOT)) {
+@@ -830,9 +845,9 @@
+     cryp.ses = sess->ses;
+     cryp.flags = 0;
+     cryp.len = count;
+-    cryp.src = (caddr_t) data;
++    cryp.src = (void*) data;
+     cryp.dst = NULL;
+-    cryp.mac = (caddr_t) state->digest_res;
++    cryp.mac = (void*) state->digest_res;
+     if (ioctl(state->d_fd, CIOCCRYPT, &cryp) < 0) {
+         printf("cryptodev_digest_update: digest failed\n");
+         return (0);
+@@ -846,8 +861,6 @@
+     struct dev_crypto_state *state = ctx->md_data;
+     struct session_op *sess = &state->d_sess;
+ 
+-    int ret = 1;
+-
+     if (!md || state->d_fd < 0) {
+         printf("cryptodev_digest_final: illegal input\n");
+         return (0);
+@@ -861,7 +874,7 @@
+         cryp.len = state->mac_len;
+         cryp.src = state->mac_data;
+         cryp.dst = NULL;
+-        cryp.mac = (caddr_t) md;
++        cryp.mac = (void*) md;
+         if (ioctl(state->d_fd, CIOCCRYPT, &cryp) < 0) {
+             printf("cryptodev_digest_final: digest failed\n");
+             return (0);
+@@ -872,7 +885,7 @@
+ 
+     memcpy(md, state->digest_res, ctx->digest->md_size);
+ 
+-    return (ret);
++    return 1;
+ }
+ 
+ static int cryptodev_digest_cleanup(EVP_MD_CTX *ctx)
+@@ -923,8 +936,8 @@
+ 
+     digest = digest_nid_to_cryptodev(to->digest->type);
+ 
+-    sess->mackey = dstate->dummy_mac_key;
+-    sess->mackeylen = digest_key_length(to->digest->type);
++    sess->mackey = NULL;
++    sess->mackeylen = 0;
+     sess->mac = digest;
+ 
+     dstate->d_fd = get_dev_crypto();
+@@ -951,34 +964,118 @@
+     return 1;
+ }
+ 
+-const EVP_MD cryptodev_sha1 = {
++static const EVP_MD cryptodev_sha1 = {
+     NID_sha1,
+-    NID_undef,
++    NID_sha1WithRSAEncryption,
+     SHA_DIGEST_LENGTH,
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
+     EVP_MD_FLAG_ONESHOT,
+     cryptodev_digest_init,
+     cryptodev_digest_update,
+     cryptodev_digest_final,
+     cryptodev_digest_copy,
+     cryptodev_digest_cleanup,
+-    EVP_PKEY_NULL_method,
++    EVP_PKEY_RSA_method,
+     SHA_CBLOCK,
+-    sizeof(struct dev_crypto_state),
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
+ };
+ 
+-const EVP_MD cryptodev_md5 = {
++static const EVP_MD cryptodev_sha256 = {
++    NID_sha256,
++    NID_sha256WithRSAEncryption,
++    SHA256_DIGEST_LENGTH, 
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
++    EVP_MD_FLAG_ONESHOT,
++    cryptodev_digest_init,
++    cryptodev_digest_update,
++    cryptodev_digest_final,
++    cryptodev_digest_copy,
++    cryptodev_digest_cleanup,
++    EVP_PKEY_RSA_method,
++    SHA256_CBLOCK,
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
++};
++
++static const EVP_MD cryptodev_sha224 = {
++    NID_sha224,
++    NID_sha224WithRSAEncryption, 
++    SHA224_DIGEST_LENGTH, 
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
++    EVP_MD_FLAG_ONESHOT,
++    cryptodev_digest_init,
++    cryptodev_digest_update,
++    cryptodev_digest_final,
++    cryptodev_digest_copy,
++    cryptodev_digest_cleanup,
++    EVP_PKEY_RSA_method,
++    SHA256_CBLOCK,
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
++};
++
++static const EVP_MD cryptodev_sha384 = {
++    NID_sha384,
++    NID_sha384WithRSAEncryption, 
++    SHA384_DIGEST_LENGTH, 
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
++    EVP_MD_FLAG_ONESHOT,
++    cryptodev_digest_init,
++    cryptodev_digest_update,
++    cryptodev_digest_final,
++    cryptodev_digest_copy,
++    cryptodev_digest_cleanup,
++    EVP_PKEY_RSA_method,
++    SHA512_CBLOCK,
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
++};
++
++static const EVP_MD cryptodev_sha512 = {
++    NID_sha512,
++    NID_sha512WithRSAEncryption, 
++    SHA512_DIGEST_LENGTH, 
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
++    EVP_MD_FLAG_ONESHOT,
++    cryptodev_digest_init,
++    cryptodev_digest_update,
++    cryptodev_digest_final,
++    cryptodev_digest_copy,
++    cryptodev_digest_cleanup,
++    EVP_PKEY_RSA_method,
++    SHA512_CBLOCK,
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
++};
++
++static const EVP_MD cryptodev_md5 = {
+     NID_md5,
+-    NID_undef,
++    NID_md5WithRSAEncryption,
+     16 /* MD5_DIGEST_LENGTH */ ,
++#if defined(EVP_MD_FLAG_PKEY_METHOD_SIGNATURE) && defined(EVP_MD_FLAG_DIGALGID_ABSENT)
++    EVP_MD_FLAG_PKEY_METHOD_SIGNATURE|
++    EVP_MD_FLAG_DIGALGID_ABSENT|
++#endif
+     EVP_MD_FLAG_ONESHOT,
+     cryptodev_digest_init,
+     cryptodev_digest_update,
+     cryptodev_digest_final,
+     cryptodev_digest_copy,
+     cryptodev_digest_cleanup,
+-    EVP_PKEY_NULL_method,
++    EVP_PKEY_RSA_method,
+     64 /* MD5_CBLOCK */ ,
+-    sizeof(struct dev_crypto_state),
++    sizeof(EVP_MD *)+sizeof(struct dev_crypto_state),
+ };
+ 
+ # endif                         /* USE_CRYPTODEV_DIGESTS */
+@@ -998,6 +1095,18 @@
+     case NID_sha1:
+         *digest = &cryptodev_sha1;
+         break;
++    case NID_sha224:
++        *digest = &cryptodev_sha224;
++        break;
++    case NID_sha256:
++        *digest = &cryptodev_sha256;
++        break;
++    case NID_sha384:
++        *digest = &cryptodev_sha384;
++        break;
++    case NID_sha512:
++        *digest = &cryptodev_sha512;
++        break;
+     default:
+ # endif                         /* USE_CRYPTODEV_DIGESTS */
+         *digest = NULL;
+@@ -1028,7 +1137,7 @@
+         return (1);
+     memset(b, 0, bytes);
+ 
+-    crp->crp_p = (caddr_t) b;
++    crp->crp_p = (void*) b;
+     crp->crp_nbits = bits;
+ 
+     for (i = 0, j = 0; i < a->top; i++) {
+@@ -1291,7 +1400,7 @@
+     kop.crk_op = CRK_DSA_SIGN;
+ 
+     /* inputs: dgst dsa->p dsa->q dsa->g dsa->priv_key */
+-    kop.crk_param[0].crp_p = (caddr_t) dgst;
++    kop.crk_param[0].crp_p = (void*) dgst;
+     kop.crk_param[0].crp_nbits = dlen * 8;
+     if (bn2crparam(dsa->p, &kop.crk_param[1]))
+         goto err;
+@@ -1334,7 +1443,7 @@
+     kop.crk_op = CRK_DSA_VERIFY;
+ 
+     /* inputs: dgst dsa->p dsa->q dsa->g dsa->pub_key sig->r sig->s */
+-    kop.crk_param[0].crp_p = (caddr_t) dgst;
++    kop.crk_param[0].crp_p = (void*) dgst;
+     kop.crk_param[0].crp_nbits = dlen * 8;
+     if (bn2crparam(dsa->p, &kop.crk_param[1]))
+         goto err;
+@@ -1415,9 +1524,10 @@
+         goto err;
+     kop.crk_iparams = 3;
+ 
+-    kop.crk_param[3].crp_p = (caddr_t) key;
+-    kop.crk_param[3].crp_nbits = keylen * 8;
++    kop.crk_param[3].crp_p = (void*) key;
++    kop.crk_param[3].crp_nbits = keylen;
+     kop.crk_oparams = 1;
++    dhret = keylen/8;
+ 
+     if (ioctl(fd, CIOCKEY, &kop) == -1) {
+         const DH_METHOD *meth = DH_OpenSSL();
+@@ -1487,7 +1597,7 @@
+     put_dev_crypto(fd);
+ 
+     if (!ENGINE_set_id(engine, "cryptodev") ||
+-        !ENGINE_set_name(engine, "BSD cryptodev engine") ||
++        !ENGINE_set_name(engine, "cryptodev engine") ||
+         !ENGINE_set_ciphers(engine, cryptodev_engine_ciphers) ||
+         !ENGINE_set_digests(engine, cryptodev_engine_digests) ||
+         !ENGINE_set_ctrl_function(engine, cryptodev_ctrl) ||

docs/helios4/files/dt-overlay/compile-dtb-lk-4.14.patch

@@ -0,0 +1,14 @@
+diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
+index aac94d96..d22bb79d 100644
+--- a/scripts/Makefile.lib
++++ b/scripts/Makefile.lib
+@@ -270,6 +270,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
+ # ---------------------------------------------------------------------------
+ DTC ?= $(objtree)/scripts/dtc/dtc
+ 
++# Enable overlay support
++DTC_FLAGS += -@
++
+ # Disable noisy checks by default
+ ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
+ DTC_FLAGS += -Wno-unit_address_vs_reg \

docs/helios4/files/dt-overlay/compile-dtb-lk-4.19.patch

@@ -0,0 +1,14 @@
+diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
+index 61e596650..fdb066e51 100644
+--- a/scripts/Makefile.lib
++++ b/scripts/Makefile.lib
+@@ -244,6 +244,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
+ # ---------------------------------------------------------------------------
+ DTC ?= $(objtree)/scripts/dtc/dtc
+ 
++# Enable overlay support
++DTC_FLAGS += -@
++
+ # Disable noisy checks by default
+ ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),)
+ DTC_FLAGS += -Wno-unit_address_vs_reg \

docs/helios4/files/led/libata_leds_trigger_mvebu.patch

@@ -0,0 +1,222 @@
+From 7c0053bae4a4e7dbab69402c47eb84e33143a176 Mon Sep 17 00:00:00 2001
+Message-Id: <7c0053bae4a4e7dbab69402c47eb84e33143a176.1544101943.git.aditya@kobol.io>
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sat, 13 Dec 2014 01:07:20 +0100
+Subject: [PATCH] libata: add ledtrig support
+
+This adds a LED trigger for each ATA port indicating disk activity.
+
+As this is needed only on specific platforms (NAS SoCs and such),
+these platforms should define ARCH_WANTS_LIBATA_LEDS if there
+are boards with LED(s) intended to indicate ATA disk activity and
+need the OS to take care of that.
+In that way, if not selected, LED trigger support not will be
+included in libata-core and both, codepaths and structures remain
+untouched.
+
+I'm currently deploying this for the oxnas target in OpenWrt
+https://dev.openwrt.org/changeset/43675/
+
+v2: rebased to kernel/git/tj/libata.git
+    plus small corrections and comments added
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+URL: https://patchwork.ozlabs.org/patch/420733/
+[Aditya Prayoga:
+* Port forward
+* Change ATA_LEDS default to no
+* Reduce performance impact by moving ata_led_act() call from
+    ata_qc_new() to ata_qc_complete()]
+Signed-off-by: Aditya Prayoga <aditya@kobol.io>
+
+ARM: mvebu: Enable ARCH_WANT_LIBATA_LEDS in Armada 38x
+
+Enable hidden symbol ARCH_WANT_LIBATA_LEDS so CONFIG_ATA_LEDS can be
+used in kernel configuration.
+
+URL: https://lists.openwrt.org/pipermail/openwrt-
+devel/2017-March/006582.html
+
+Signed-off-by: Aditya Prayoga <aditya@kobol.io>
+---
+ arch/arm/configs/mvebu_v7_defconfig |  1 +
+ arch/arm/mach-mvebu/Kconfig         |  1 +
+ drivers/ata/Kconfig                 | 16 +++++++++++
+ drivers/ata/libata-core.c           | 56 +++++++++++++++++++++++++++++++++++++
+ include/linux/libata.h              |  7 +++++
+ 5 files changed, 81 insertions(+)
+
+diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
+index 5514021..3d39ab2 100644
+--- a/arch/arm/configs/mvebu_v7_defconfig
++++ b/arch/arm/configs/mvebu_v7_defconfig
+@@ -59,6 +59,7 @@ CONFIG_MTD_UBI=y
+ CONFIG_EEPROM_AT24=y
+ CONFIG_BLK_DEV_SD=y
+ CONFIG_ATA=y
++CONFIG_ATA_LEDS=y
+ CONFIG_SATA_AHCI=y
+ CONFIG_AHCI_MVEBU=y
+ CONFIG_SATA_MV=y
+diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
+index 2c20599..51f3256 100644
+--- a/arch/arm/mach-mvebu/Kconfig
++++ b/arch/arm/mach-mvebu/Kconfig
+@@ -68,6 +68,7 @@ config MACH_ARMADA_38X
+ 	select HAVE_SMP
+ 	select MACH_MVEBU_V7
+ 	select PINCTRL_ARMADA_38X
++	select ARCH_WANT_LIBATA_LEDS
+ 	help
+ 	  Say 'Y' here if you want your kernel to support boards based
+ 	  on the Marvell Armada 380/385 SoC with device tree.
+diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
+index 39b181d..143bbd5 100644
+--- a/drivers/ata/Kconfig
++++ b/drivers/ata/Kconfig
+@@ -46,6 +46,22 @@ config ATA_VERBOSE_ERROR
+ 
+ 	  If unsure, say Y.
+ 
++config ARCH_WANT_LIBATA_LEDS
++	bool
++
++config ATA_LEDS
++	bool "support ATA port LED triggers"
++	depends on ARCH_WANT_LIBATA_LEDS
++	select NEW_LEDS
++	select LEDS_CLASS
++	select LEDS_TRIGGERS
++	default y
++	help
++	  This option adds a LED trigger for each registered ATA port.
++	  It is used to drive disk activity leds connected via GPIO.
++
++	  If unsure, say N.
++
+ config ATA_ACPI
+ 	bool "ATA ACPI Support"
+ 	depends on ACPI
+diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
+index 599e01b..65228f5 100644
+--- a/drivers/ata/libata-core.c
++++ b/drivers/ata/libata-core.c
+@@ -5105,6 +5105,30 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
+ }
+ 
+ /**
++ *	ata_led_act - Trigger port activity LED
++ *	@ap: indicating port
++ *
++ *	Blinks any LEDs registered to the trigger.
++ *	Commonly used with leds-gpio on NAS systems with disk activity
++ *	indicator LEDs.
++ *
++ *	LOCKING:
++ *	None.
++ */
++static inline void ata_led_act(struct ata_port *ap)
++{
++#ifdef CONFIG_ATA_LEDS
++#define LIBATA_BLINK_DELAY 20 /* ms */
++	unsigned long led_delay = LIBATA_BLINK_DELAY;
++
++	if (unlikely(!ap->ledtrig))
++		return;
++
++	led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0);
++#endif /* CONFIG_ATA_LEDS */
++}
++
++/**
+  *	ata_qc_new_init - Request an available ATA command, and initialize it
+  *	@dev: Device from whom we request an available command structure
+  *	@tag: tag
+@@ -5249,6 +5273,10 @@ void ata_qc_complete(struct ata_queued_cmd *qc)
+ 	/* Trigger the LED (if available) */
+ 	ledtrig_disk_activity(!!(qc->tf.flags & ATA_TFLAG_WRITE));
+ 
++#ifdef CONFIG_ATA_LEDS
++	ata_led_act(ap);
++#endif
++
+ 	/* XXX: New EH and old EH use different mechanisms to
+ 	 * synchronize EH with regular execution path.
+ 	 *
+@@ -6028,6 +6056,9 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
+ 	ap->stats.unhandled_irq = 1;
+ 	ap->stats.idle_irq = 1;
+ #endif
++#ifdef CONFIG_ATA_LEDS
++	ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
++#endif
+ 	ata_sff_port_init(ap);
+ 
+ 	return ap;
+@@ -6063,6 +6094,12 @@ static void ata_host_release(struct kref *kref)
+ 
+ 		kfree(ap->pmp_link);
+ 		kfree(ap->slave_link);
++#ifdef CONFIG_ATA_LEDS
++		if (ap->ledtrig) {
++			led_trigger_unregister(ap->ledtrig);
++			kfree(ap->ledtrig);
++		};
++#endif
+ 		kfree(ap);
+ 		host->ports[i] = NULL;
+ 	}
+@@ -6527,6 +6564,25 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
+ 		host->ports[i]->local_port_no = i + 1;
+ 	}
+ 
++#ifdef CONFIG_ATA_LEDS
++	/* register LED triggers for all ports */
++	for (i = 0; i < host->n_ports; i++) {
++		if (unlikely(!host->ports[i]->ledtrig))
++			continue;
++
++		snprintf(host->ports[i]->ledtrig_name,
++			sizeof(host->ports[i]->ledtrig_name), "ata%u",
++			host->ports[i]->print_id);
++
++		host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
++
++		if (led_trigger_register(host->ports[i]->ledtrig)) {
++			kfree(host->ports[i]->ledtrig);
++			host->ports[i]->ledtrig = NULL;
++		}
++	}
++#endif
++
+ 	/* Create associated sysfs transport objects  */
+ 	for (i = 0; i < host->n_ports; i++) {
+ 		rc = ata_tport_add(host->dev,host->ports[i]);
+diff --git a/include/linux/libata.h b/include/linux/libata.h
+index 38c95d6..3cc5f63 100644
+--- a/include/linux/libata.h
++++ b/include/linux/libata.h
+@@ -38,6 +38,7 @@
+ #include <linux/acpi.h>
+ #include <linux/cdrom.h>
+ #include <linux/sched.h>
++#include <linux/leds.h>
+ 
+ /*
+  * Define if arch has non-standard setup.  This is a _PCI_ standard
+@@ -893,6 +894,12 @@ struct ata_port {
+ #ifdef CONFIG_ATA_ACPI
+ 	struct ata_acpi_gtm	__acpi_init_gtm; /* use ata_acpi_init_gtm() */
+ #endif
++
++#ifdef CONFIG_ATA_LEDS
++	struct led_trigger	*ledtrig;
++	char			ledtrig_name[8];
++#endif
++
+ 	/* owned by EH */
+ 	u8			sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
+ };
+-- 
+2.7.4
+

docs/helios4/files/sdcard/helios4_dtb_sd_uhs_linux_stable.patch

@@ -0,0 +1,34 @@
+From 76fa8b1b9cd666312ade19e01de7c4a4103efe9b Mon Sep 17 00:00:00 2001
+Message-Id: <76fa8b1b9cd666312ade19e01de7c4a4103efe9b.1544609988.git.aditya@kobol.io>
+From: Aditya Prayoga <aditya@kobol.io>
+Date: Wed, 12 Dec 2018 15:02:16 +0800
+Subject: [PATCH] arm: dts: armada-388-helios4: Enable High Speed and UHS-I
+ support
+
+Enable High Speed and UHS-I mode support on SD card controller as
+specified by Functional Specification document.
+
+Signed-off-by: Aditya Prayoga <aditya@kobol.io>
+---
+ arch/arm/boot/dts/armada-388-helios4.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts
+index 705adfa..23785ec 100644
+--- a/arch/arm/boot/dts/armada-388-helios4.dts
++++ b/arch/arm/boot/dts/armada-388-helios4.dts
+@@ -253,6 +253,11 @@
+ 				status = "okay";
+ 				vmmc = <&reg_3p3v>;
+ 				wp-inverted;
++				cap-sd-highspeed;
++				sd-uhs-sdr12;
++				sd-uhs-sdr25;
++				sd-uhs-sdr50;
++				sd-uhs-ddr50;
+ 			};
+ 
+ 			usb@58000 {
+-- 
+2.7.4
+

docs/helios4/files/sdcard/run_sdcard_test.sh

@@ -0,0 +1,47 @@
+#!/bin/bash
+
+get_flash_information() {
+	# http://www.bunniestudios.com/blog/?page_id=1022
+	while read Device ; do
+		DeviceNode="${Device%/*}"
+		DeviceName="${DeviceNode##*/}"
+		echo -e "\n### ${DeviceName} info:\n"
+		find "${DeviceNode}" -maxdepth 1 -type f | while read ; do
+			NodeName="${REPLY##*/}"
+			echo -e "$(printf "%20s" ${NodeName}): $(cat "${DeviceNode}/${NodeName}" | tr '\n' " ")"
+		done
+
+		oem=$(cat ${DeviceNode}/name)
+		CardName="${DeviceName}-[${oem//[^a-zA-Z0-9]/_}]"
+	done <<< $(find /sys -name oemid)
+} # get_flash_information
+
+get_flash_information > card_info.txt
+LOGFILE="SD_test_${CardName}_$(date +%Y%m%d_%H%M%S).log"
+
+[[ -d /mnt/sdcard ]] || mkdir -p /mnt/sdcard
+mount /dev/mmcblk0p1 /mnt/sdcard
+result=$?
+
+if [[ $result -ne 0 ]]; then
+	echo "failed to mount SD card. Stopped the test"
+	exit 1
+fi
+
+cat card_info.txt | tee -a $LOGFILE
+rm -f card_info.txt
+
+echo -e "\n\n===============================\n\n" >> $LOGFILE
+
+echo "Start benchmarking ..." | tee -a ${LOGFILE}
+echo "Please wait"
+echo -e "\n\n1st run\n\n" | tee -a ${LOGFILE}
+iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 -f /mnt/sdcard/iozone-test.dat | tee -a ${LOGFILE}
+echo -e "\n\n===============================\n\n" >> $LOGFILE
+
+echo -e "\n\n2nd run\n\n" | tee -a ${LOGFILE}
+iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 -f /mnt/sdcard/iozone-test.dat | tee -a ${LOGFILE}
+echo -e "\n\n===============================\n\n" >> $LOGFILE
+
+umount /mnt/sdcard
+echo "Done" | tee -a ${LOGFILE}

docs/helios4/files/uboot/boot_spi_en.cmd

@@ -0,0 +1,47 @@
+# DO NOT EDIT THIS FILE
+#
+# Please edit /boot/armbianEnv.txt to set supported parameters
+#
+
+# default values
+setenv rootdev "/dev/mmcblk0p1"
+setenv rootfstype "ext4"
+setenv verbosity "1"
+setenv prefix "/boot/"
+setenv boot_interface "mmc"
+setenv ethaddr "00:50:43:84:fb:2f"
+setenv eth1addr "00:50:43:25:fb:84"
+
+# fdtfile should come from compile-time u-boot patches
+if test -z "${fdtfile}"; then
+	setenv fdtfile "armada-388-helios4.dtb"
+fi
+
+echo "Boot script loaded from ${boot_interface}"
+
+if load ${boot_interface} 0:1 ${loadaddr} ${prefix}armbianEnv.txt; then
+	env import -t ${loadaddr} ${filesize}
+fi
+
+setenv bootargs "console=ttyS0,115200 root=${rootdev} rootwait rootfstype=${rootfstype} ubootdev=${boot_interface} scandelay loglevel=${verbosity} usb-storage.quirks=${usbstoragequirks} ${extraargs}"
+
+ext4load  ${boot_interface} 0:1 ${fdt_addr} ${prefix}dtb/${fdtfile}
+ext4load  ${boot_interface} 0:1 ${ramdisk_addr_r} ${prefix}uInitrd
+ext4load  ${boot_interface} 0:1 ${kernel_addr_r} ${prefix}zImage
+
+setenv fdt_high 0xffffffff
+setenv initrd_high 0xffffffff
+
+fdt addr ${fdt_addr}
+fdt resize
+
+# Update device tree node
+fdt set /soc/internal-regs/sata@e0000 status "disabled"
+fdt set /soc/internal-regs/sata@a8000 status "disabled"
+fdt set /soc/spi@10680 status "okay"
+fdt set /soc/spi@10680/spi-flash@0 status "okay"
+
+bootz ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr}
+
+# Recompile with:
+# mkimage -C none -A arm -T script -d boot_spi_en.cmd /boot_spi_en.scr

docs/helios4/files/uboot/u-boot-armbian-boot-script-support.patch

@@ -0,0 +1,107 @@
+From 6df182d492d2162c501abbd1df237484b4a13023 Mon Sep 17 00:00:00 2001
+Message-Id: <6df182d492d2162c501abbd1df237484b4a13023.1538711251.git.aditya@kobol.io>
+From: ubuntu <aditya@kobol.io>
+Date: Fri, 28 Sep 2018 17:34:33 +0800
+Subject: [PATCH] armbian boot script support
+
+---
+ board/mv_ebu/a38x/mv_main_a38x.c | 37 ++++++++++++++++++++++---------------
+ common/cmd_fs.c                  |  2 +-
+ include/configs/armada_38x.h     |  3 +--
+ 3 files changed, 24 insertions(+), 18 deletions(-)
+
+diff --git a/board/mv_ebu/a38x/mv_main_a38x.c b/board/mv_ebu/a38x/mv_main_a38x.c
+index 0dce7f6..137dd58 100755
+--- a/board/mv_ebu/a38x/mv_main_a38x.c
++++ b/board/mv_ebu/a38x/mv_main_a38x.c
+@@ -331,6 +331,10 @@ void misc_init_r_env(void)
+ 	if (!env)
+ 		setenv("console", "console=ttyS0,115200");
+
++	env = getenv("fdtfile");
++	if (!env)
++		setenv("fdtfile", "armada-388-helios4.dtb");
++
+ 	env = getenv("mtdids");
+ 	if (!env) {
+ #if defined(MV_NAND) && defined(MV_INCLUDE_SPI)
+@@ -679,25 +683,28 @@ void misc_init_r_env(void)
+ 		setenv("enaLPAE", "no");
+ #endif
+
+-	/* Flatten Device Tree environment setup */
+-#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
+-	#ifdef CONFIG_ARMADA_38X
+-		fdt_env_setup("armada-38x.dtb", MV_FALSE); /* static setup: Skip DT update for customer */
+-	#else
+-		fdt_env_setup("armada-39x.dtb", MV_FALSE);
+-	#endif
+-#else
+-	#ifdef CONFIG_ARMADA_38X
+-		fdt_env_setup("armada-38x-modular.dtb", MV_TRUE); /* dynamic setup: run DT update */
+-	#else
+-		fdt_env_setup("armada-39x.dtb", MV_FALSE); /* static setup: Skip DT update */
+-	#endif
+-#endif
++	setenv("fdt_skip_update", "yes");
++	setenv("boot_a_script",
++		"for prefix in /boot/ /; do \
++		load ${boot_interface} 0:1 ${script_addr_r} ${prefix}boot.scr && \
++		source ${script_addr_r}; \
++		done");
++	setenv("mmcboot",
++		"setenv boot_interface mmc; run boot_a_script;");
++	setenv("sataboot",
++		"scsi init; setenv boot_interface scsi; run boot_a_script;");
++	setenv("usbboot",
++		"setenv usbActive 1; setenv usbType 3; usb start; setenv boot_interface usb; run boot_a_script;");
+
+ #if (CONFIG_BOOTDELAY >= 0)
+ 	env = getenv("bootcmd");
+ 	if (!env)
+-		setenv("bootcmd", "tftpboot 0x2000000 $image_name;tftpboot $fdtaddr $fdtfile;"
++		setenv("bootcmd",
++		"echo Trying to boot from USB; run usbboot;"
++		"echo Trying to boot from SATA; run sataboot;"
++		"echo Trying to boot from MMC; run mmcboot;"
++		"echo Default boot sequence failed - falling back to TFTP;"
++		"tftpboot 0x2000000 $image_name;tftpboot $fdtaddr $fdtfile;"
+ 		"setenv bootargs $console $nandEcc $mtdparts $bootargs_root nfsroot=$serverip:$rootpath "
+ 		"ip=$ipaddr:$serverip$bootargs_end $mvNetConfig video=dovefb:lcd0:$lcd0_params "
+ 		"clcd.lcd0_enable=$lcd0_enable clcd.lcd_panel=$lcd_panel; bootz 0x2000000 - $fdtaddr;");
+diff --git a/common/cmd_fs.c b/common/cmd_fs.c
+index a681d03..9cc5013 100644
+--- a/common/cmd_fs.c
++++ b/common/cmd_fs.c
+@@ -22,7 +22,7 @@
+
+ int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+ {
+-	return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY, 0);
++	return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY, 16);
+ }
+
+ U_BOOT_CMD(
+diff --git a/include/configs/armada_38x.h b/include/configs/armada_38x.h
+index c57353f..746c843 100644
+--- a/include/configs/armada_38x.h
++++ b/include/configs/armada_38x.h
+@@ -164,7 +164,7 @@ extern unsigned int mvUartPortGet(void);
+ #define CONFIG_CMD_RCVR
+ #define CONFIG_CMD_BOOT_MENU
+ #define CONFIG_CMD_SYS_RESTORE
+-
++#define CONFIG_CMD_FS_GENERIC
+
+ /* Open this define for enabling Secure Boot Mode eFuses modification
+ #define CONFIG_CMD_EFUSE
+@@ -207,7 +207,6 @@ extern unsigned int mvUartPortGet(void);
+ #define CONFIG_FS_EXT4
+ #define CONFIG_CMD_EXT4_WRITE
+ #define CONFIG_EXT4_WRITE
+-#define CONFIG_CMD_JFFS2
+ #define CONFIG_CMD_FAT
+ #define CONFIG_FS_FAT
+ #define CONFIG_SUPPORT_VFAT
+--
+2.7.4

docs/helios4/files/uboot/u-boot-mainline-armbian-boot-script-support.patch

@@ -0,0 +1,46 @@
+From 61ddc75ecb082cba51fe7da4d0bc4c73c56abf38 Mon Sep 17 00:00:00 2001
+Message-Id: <61ddc75ecb082cba51fe7da4d0bc4c73c56abf38.1543232476.git.aditya@kobol.io>
+From: Aditya Prayoga <aditya@kobol.io>
+Date: Mon, 26 Nov 2018 19:07:49 +0800
+Subject: [PATCH] helios4: add boot-marvell.cmd backward compatibility
+
+On system that still use boot.scr derived from boot-marvell.cmd, new
+u-boot 2018 will failed load dtb and script due to missing some
+variables. This will render the system unbootable.
+
+These changes added the missing variables.
+
+Signed-off-by: Aditya Prayoga <aditya@kobol.io>
+---
+ include/config_distro_bootcmd.h | 1 +
+ include/configs/helios4.h       | 2 ++
+ 2 files changed, 3 insertions(+)
+
+diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
+index 373fee7..f469b2d 100644
+--- a/include/config_distro_bootcmd.h
++++ b/include/config_distro_bootcmd.h
+@@ -371,6 +371,7 @@
+ 	"boot_a_script="                                                  \
+ 		"load ${devtype} ${devnum}:${distro_bootpart} "           \
+ 			"${scriptaddr} ${prefix}${script}; "              \
++		"setenv boot_interface ${devtype};" \
+ 		"source ${scriptaddr}\0"                                  \
+ 	\
+ 	"scan_dev_for_scripts="                                           \
+diff --git a/include/configs/helios4.h b/include/configs/helios4.h
+index 6943378..299c58d 100644
+--- a/include/configs/helios4.h
++++ b/include/configs/helios4.h
+@@ -185,6 +185,8 @@
+ 	LOAD_ADDRESS_ENV_SETTINGS \
+ 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+ 	"console=ttyS0,115200\0" \
++	"loadaddr=0x02000000\0" \
++	"fdt_addr=" FDT_ADDR_R "\0" \
+ 	BOOTENV
+ 
+ #endif /* CONFIG_SPL_BUILD */
+-- 
+2.7.4
+

docs/helios4/files/wol/helios4-dts-add-wake-on-lan-support.patch

@@ -0,0 +1,23 @@
+diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts
+index 705adfa8c..d5afbfc53 100644
+--- a/arch/arm/boot/dts/armada-388-helios4.dts
++++ b/arch/arm/boot/dts/armada-388-helios4.dts
+@@ -84,6 +84,18 @@
+ 		};
+ 	};
+ 
++	gpio-keys {
++		compatible = "gpio-keys";
++		pinctrl-0 = <&microsom_phy0_int_pins>;
++
++		wol {
++			label = "Wake-On-LAN";
++			linux,code = <KEY_WAKEUP>;
++			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
++			wakeup-source;
++		};
++	};
++
+ 	io-leds {
+ 		compatible = "gpio-leds";
+ 		sata1-led {

docs/helios4/files/wol/lk4.14-mvebu-gpio-add_wake_on_gpio_support.patch

@@ -0,0 +1,90 @@
+diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
+index 661c5a38f..a25d61d54 100644
+--- a/drivers/gpio/gpio-mvebu.c
++++ b/drivers/gpio/gpio-mvebu.c
+@@ -38,6 +38,7 @@
+ #include <linux/err.h>
+ #include <linux/gpio.h>
+ #include <linux/init.h>
++#include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/irq.h>
+ #include <linux/irqchip/chained_irq.h>
+@@ -133,7 +134,7 @@ struct mvebu_gpio_chip {
+ 	struct regmap     *regs;
+ 	u32		   offset;
+ 	struct regmap     *percpu_regs;
+-	int		   irqbase;
++	int		   bank_irq[4];
+ 	struct irq_domain *domain;
+ 	int		   soc_variant;
+ 
+@@ -608,6 +609,33 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
+ 	chained_irq_exit(chip, desc);
+ }
+ 
++/*
++ * Set interrupt number "irq" in the GPIO as a wake-up source.
++ * While system is running, all registered GPIO interrupts need to have
++ * wake-up enabled. When system is suspended, only selected GPIO interrupts
++ * need to have wake-up enabled.
++ * @param  irq          interrupt source number
++ * @param  enable       enable as wake-up if equal to non-zero
++ * @return       This function returns 0 on success.
++ */
++static int mvebu_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
++{
++	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
++	struct mvebu_gpio_chip *mvchip = gc->private;
++	int irq;
++	int bank;
++
++	bank = d->hwirq % 8;
++	irq = mvchip->bank_irq[bank];
++
++	if (enable)
++		enable_irq_wake(irq);
++	else
++		disable_irq_wake(irq);
++
++	return 0;
++}
++
+ /*
+  * Functions implementing the pwm_chip methods
+  */
+@@ -1277,7 +1305,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
+ 
+ 	err = irq_alloc_domain_generic_chips(
+ 	    mvchip->domain, ngpios, 2, np->name, handle_level_irq,
+-	    IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, 0);
++	    IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, IRQ_GC_INIT_NESTED_LOCK);
+ 	if (err) {
+ 		dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n",
+ 			mvchip->chip.label);
+@@ -1295,6 +1323,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
+ 	ct->chip.irq_mask = mvebu_gpio_level_irq_mask;
+ 	ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask;
+ 	ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
++	ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq;
++	ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;
+ 	ct->chip.name = mvchip->chip.label;
+ 
+ 	ct = &gc->chip_types[1];
+@@ -1303,6 +1333,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
+ 	ct->chip.irq_mask = mvebu_gpio_edge_irq_mask;
+ 	ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask;
+ 	ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
++	ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq;
++	ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;
+ 	ct->handler = handle_edge_irq;
+ 	ct->chip.name = mvchip->chip.label;
+ 
+@@ -1318,6 +1350,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
+ 			continue;
+ 		irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler,
+ 						 mvchip);
++		mvchip->bank_irq[i] = irq;
+ 	}
+ 
+ 	/* Some MVEBU SoCs have simple PWM support for GPIO lines */